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Digital VLSI Chip Design with Cadence and Synopsys CAD Tools
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(Paperback - Mar. 7, 2009)
by Erik Brunvand
Sales Rank: 366655
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List Price: $34.00
$27.27
At Amazon

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Paperback: 624 pages
Publisher: Addison Wesley; 1 edition March 7, 2009
Language: English
ISBN-10: 9780321547996
ISBN-13: 978-0321547996
ASIN: 0321547993
Product Dimensions:
9.1 x 7.3 x 0.9 inches
Shipping Weight: 1.9 pounds
Product Description
KEY BENEFIT: This hands-on book leads readers through the complete process of building a ready-to-fabricate CMOS integrated circuit using popular commercial design software. KEY TOPICS: The VLSI CAD flow described in this book uses tools from two vendors: Cadence Design Systems, Inc. and Synopsys Inc. Detailed tutorials include step-by-step instructions and screen shots of tool windows and dialog boxes. MARKET: A useful reference for chip designers.
Customer Reviews & Comments This book provides a good introduction to synopsys and cadence software, however it is not without many flaws.
First of all, throughout the book the author reference the University of Utah libraries which are supposed to be available online, but were nowhere to be found. This made it very difficult for me to follow along, since I was using the NCSU libraries which are claimed to be supported by this book, but are not fully. This book seems like it was written for a specific purpose (to teach U of U students how to use VLSI design software the way it is set up on their campus). That's great, but it doesn't belong in published book format.
Also, when the author finally discusses synthesis using design compiler / vision, he does a terrible job explaining how libraries work and where to find them. Once again, it assumes you are using the set-up at U of Utah and its all there for you.
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Digital VLSI Chip Design with Cadence and Synopsys CAD Tools
List Price: $34.00
Available from Amazon
Price: $27.27

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